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| Simulation |
- Model Sim, VCS, Verilog-XL/NC |
| Rule based verification |
- Explore RTL |
| Code coverage |
- HDL Score |
| ASIC Synthesis |
- Synopsis DC/DA |
| Timing analysis |
- Prime time |
| FPGA Synthesis |
- FPGA compiler, Synplify |
| FPGA Implementation |
- Xilinx, Altera |
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